1. [Field of the Invention]
The present invention relates to a semiconductor device and in particular to a semiconductor device having an internal memory capable of performing power-save operation with a power consumption smaller than that in the normal operation.
2. [Description of the Related Art]
Power consumption is one of most essential electric characteristics of mobile instruments such as mobile phones and PDAs (personal digital assistants) powered by batteries. No problem may arise if power supply to all circuits within a mobile instrument can be interrupted, but a part of the circuits cannot be disconnected from the power supply, because the mobile phones, for example, must establish broadcast control channel at predetermined intervals of time. Also for the PDAs, a satisfactory level of response speed is required when they return from the power-save operation back to the normal operation.
For example, microcomputers of some mobile instruments, having a processor (CPU) and a volatile internal memory as a work memory therefor, hold programs for the processor, table data for hardware setting and so forth in the internal memory during the operation thereof. The programs, table data and so forth are copied from a non-volatile external memory into the internal memory, by a boot operation after the power-ON.
Interruption of the power supply to the internal memory therefore needs a reboot operation for the operation for the next time, so as to copy the programs for the processor and the table data for hardware setting again from the external memory into the internal memory. The reboot operation, however, takes a considerably long time, and is not negligible in terms of a power consumption, because power consumption occurs also in the input/output (I/O) circuits or the like, due to access to the external memory. It is therefore necessary to constantly supply current to the internal memory so as to avoid the reboot operation.
Recent integrated circuits, typified by LSIs, are becoming more severely suffered from an increasing leakage current ascribable to gate leakage and channel leakage, with advancement in micronization of the process, so that even the constant power supply only simply to the circuits results in a large power consumption due to the leakage current. More specifically, recent power consumption ascribable to the leakage current amounts as large as 10% or around of the power consumption during the operation, which is a non-ignorable level.
Some efforts have been made on reduction in the leakage current, in which the above-described internal memory is supplied only with a reduced source voltage during the period other than the normal operation. However, the reduction in the source voltage to a level not higher than the data-holding-guarantee voltage (also referred to as data-holding source voltage, or power-down source voltage), which is prescribed in the specification of the internal memory as a voltage reliably assuring the held data, cannot guarantee the data held in the internal memory, and this limits an allowable range for the lowering in the source voltage.
FIG. 10 is a block diagram showing an exemplary configuration of a conventional microcomputer system owned by a mobile instrument. A microcomputer 51 has a processor (CPU) 53, a loader 54, and an internal memory 55.
The processor 53 takes part in executing calculation and control of various functional units in the microcomputer 51. The loader 54 reads a data held by the external memory 52 provided outside the microcomputer 51, and writes (copies) it into the internal memory 55, following instructions of the processor 53.
The external memory 52 is a non-volatile memory holding programs for the processor 53, table data and so forth. The internal memory 55 is a volatile memory functions as a work memory of the processor 53. The power source unit 56 supplies a source voltage VM to the internal memory 55.
Next paragraphs will describe operations of a mobile phone applied with the microcomputer system shown in FIG. 10, referring to FIG. 11. FIG. 11 shows an intermittent operation of the mobile phone, wherein TN denotes a normal operation period, and TS denotes a power-save operation period allowing operation at a power consumption lower than that in the normal operation.
The mobile phone having the microcomputer system shown in FIG. 10 operates following either of the process flow A and process flow B.
<Process Flow A>
Step A1: Upon power-ON, (or upon detection of any abnormality), the processor 53 reads a boot program stored in a ROM or the like, not shown, and executes it. The loader 54 herein reads a program for the processor 53, table data and so forth held in a fixed data area DOA of the external memory 52, and writes the readout data into a data area DIA of the internal memory 55, following instructions of the processor 53. In this way, the boot operations, such as copying of the program for the processor 53, table data and so forth from the external memory 52 to the internal memory 55, and various initial settings by the processor 53, are carried out. After completion of the boot operations, the processor 53 starts the operation based on the program held in the internal memory 55.
Step A2: Detection of base station, registration of location and incoming call detection are carried out, and wait operation is started if there is neither incoming call nor outgoing call (normal operation).
Step A3: The source voltage VM to be supplied to the internal memory 55 is reduced to voltage V1 at time t11 (power-save operation started). The voltage V1 is a data-holding-guarantee voltage of the internal memory 55.
Step A4: The source voltage VM to be supplied to the internal memory 55 is raised to V2 at time t12, after the elapse of period TS from time t11 (power-save operation completed).
Steps A2 to A4 are repeated thereafter.
<Process Flow B>
Step B1: The boot operations similar to those in step A1 of process flow A are carried out.
Step B2: Detection of base station, registration of location and incoming call detection are carried out, and wait operation is started if there is neither incoming call nor outgoing call (normal operation).
Step B3: Necessary data out of those held in the internal memory 55 is saved in the external memory 52.
Step B4: The source voltage VM to be supplied to the internal memory 55 is set to 0 V at time t11, or power supply to the internal memory 55 is interrupted (power-save operation started).
Step B5: The source voltage VM to be supplied to the internal memory 55 is raised to V2 at time t12, after the elapse of period TS from time t11 (power-save operation completed).
Step B6: Reboot operation is carried out similarly to as in step B1. At the same time, the program, table data and so forth are re-transferred from the fixed data area DOA of the external memory 52 to the data area DIA of the internal memory 55 (RD in FIG. 11).
Step B7: The data saved in step B3 is reloaded to the internal memory 55 (rereading and rewriting).
Steps B2 to B7 are repeated thereafter.
The mobile phone having short intermittent intervals (period TS shown in FIG. 11) may basically be operated based on the process flow A. The process flow A and process flow B, however, have respective problems. The process flow A, lowering the source voltage VM to be supplied to the internal memory 55 to the data-holding-guarantee voltage V1 in the power-save operation, is only limitative in terms of a range of lowering of the source voltage, which can only be effected down to the data-holding-guarantee voltage V1, and can therefore reduce the leakage current (power consumption) only to a certain limited degree. On the other hand, the process flow B, interrupting the power supply to the internal memory 55 in the power-save operation, essentially needs the reboot operation when the operation returns to the normal operation, and this requires a considerably long time and a large power consumption.
The process flow A, designed so as to lower the source voltage in an operation other than the normal operation, supervises whether the source voltage satisfies the data-holding-guarantee voltage or not. The actual internal memory has some margin over the data-holding-guarantee voltage, and the margin varies from product to product. The source voltage dropped down to the data-holding-guarantee voltage or below does not always mean destruction of the data held in the internal memory. There is, however, no unit capable of detecting whether the data has been destructed or not, so that the source voltage dropped down to the data-holding-guarantee voltage or below always resulted in reloading and resetting, assuming that all data have been destructed, even if the data have not actually been destructed. This is a large obstacle to reduction in the power consumption.
Patent Document 1 discloses a data inspection system of RAM equipped with a backup power source circuit.
(Patent Document 1) Japanese Patent Application Laid-open No. Hei 3-144838